1. Field of the Invention
This invention relates to a semiconductor device and, in particular, to a technique for transmitting a predetermined voltage such as a reference voltage to away areas on a semiconductor chip.
2. Description of Related Art
In semiconductor devices, a reference voltage (VREF) generated by an internal voltage generating circuit or the like is transmitted via wires to various circuits wired on a semiconductor chip. Circuits required to the reference voltage are not to ones disposed in the proximity of the internal voltage generating circuit. Therefore, there may be a case where the reference voltage is transmitted via wires to away areas on the semiconductor chip.
Something else, instruction signals required to drive various circuits, input/output data signals transmitted/received between a memory circuit and an input/output circuit, and so on are transmitted via wires.
Various prior art documents related to this invention are already known.
By way of example, JP-A-2006-173382 (which will be also called Patent Document 1) discloses a data output portion for a DRAM chip in which first and second ground wires are disposed so as to sandwich first and second control signal lines from outside which are connected to gates of a pMOSFET and an nMOSFET constituting a data output CMOS driver, respectively. The first and the second ground wires lie between a pair of the first and the second control lines and another pair thereof thereby shielding the pair of the first and the second control lines against noises due to the other pair thereof.
In addition, JP-A-2000-353785 (which will be also called Patent Document 2) discloses a semiconductor device which can prevent any effect of noises of other circuits in a semiconductor chip and noises of coupling capacitance and which can supply a reference voltage to a driving circuit with stability. Shielding wires are disposed around a wire for the reference voltage VR. Each shielding wire is fixed to a constant voltage (a ground potential). It is possible to prevent noises due to a capacitance coupling to a substrate by disposing a shielding wire under the wire for the reference voltage VR, it is possible to prevent noises due to a capacitance coupling to adjacent wires by disposing shielding wires both sides of the wire for the reference voltage VR, and it is also prevent noises due to a capacitance coupling via an upper space by disposing a shielding wire above the wire for the reference voltage VR.
It is desirable that a voltage transmitting in a wire has little effect of noises (coupling noises) due to a capacitance coupling from other circuit or wires. This is because it prevents the reference voltage from fluctuating by receiving the noises (the coupling noises) from other circuits in the semiconductor chip.
As an art for reducing the noises (the coupling noises), an art for wiring shield lines along a wire for transmitting a voltage is known, as in the manner which is disclosed in the above-mentioned Patent Documents 1 and 2. The shield lines are generally fixed to the ground potential having relatively less fluctuations and it is therefore reduce the coupling noises from the other circuits or the other wires.
On the other hand, according to a study by the present inventors, it turned out that it is susceptible to improvement in regard to a shielding method in which shield lines with a fixed potential are put side by side a transmission wire, in the manner which will later be described in conjunction with FIGS. 1A, 1B, 2, 3, 4, 5A, 5B, and 5C. In brief, noises can occur in the ground potential or a power supply potential to which the shield lines are fixed per se.